Xilinx XCZU2CG-1SBVA484E FBGA(484) Device
Adapters for Automated Programmers
| 8th Gen |
| FVEASM484BGAE, FVEASM484BGAE |
Adapters for Manual Programmers
| 8th Gen |
| FVEASM484BGAE, FVEASM484BGAE |
Adapters for Engineering Programmers
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT:
| Device Type: | Xilinx Zynq UltraScale+ MPSoC |
| Device Memory Type: | eFUSE |
| Algorithm Programming Method: | JTAG + QSPI Program and Verify Boot Images |
| Serialization Supported: | No |
Memory Organization:
| Memory Type |
Attributes* |
Included in Default Range (Y/N) | BPWin Buffer Address (hex) |
| Program Image (QSPI_0) | R/W/E | Yes | 0000_0000 – 00FF_FFFF |
| Verify Image (QSPI_1) | R/W/E | Yes | 0100_0000 – 01FF_FFFF |
| Default Algorithm Range | — | — | 0000_0000 – 01FF_FFFF |
* R/W/E: verifiable and re-programmable. Special Device Considerations:
| 1. | Programming the eFUSE of a DUT is a one-time operation. If a DUT is already programmed the program image will return a device not blank error. |
| 2. | To program the eFUSE of the DUT an appropriate program image must be programmed into QSPI_0. Then under Device->Settings the ‘Load Program Image (QSPI_0)’ option should be set to ‘1 (Load).’ The program image will then be loaded into the device at the end of Verify after Program. The image in QSPI_0 will not be loaded at the end of stand-alone Verify. |
| 3. | To verify the eFUSE of the DUT an appropriate verify image must be programmed into QSPI_1. Then under Device->Settings the ‘Load Verify Image (QSPI_1)’ option should be set to ‘1 (Load).’ The verify image will then be loaded into the device at the end of Verify after Program or stand-alone Verify. |
| 4. | For Verify after Program if both program and verify images are used the program image will be loaded first. After it successfully loads then the verify image will be loaded. |
| 5. | Erase Program and Verify operations on the QSPI devices may be performed once or skipped by setting the ‘QSPI Erase and Program’ and ‘QSPI Verify’ options under Device->Settings to ‘1 (Once)’ or ‘2 (Skip)’ respectively. |
| 6. | The QSPI devices will be verified every time they are programmed even if the ‘QSPI Verify’ option under Device->Settings is set to ‘1 (Once)’ or ‘2 (Skip).’ |
| 7. | If a program image is programmed into QSPI_1 the DUT may be unintentionally programmed. |
| 8. | After programming the DNA and ID values may be unreadable from the DUT. This will cause subsequent operations on the DUT to fail the ID Check operation. These failures may be skipped by setting the ‘Fail on Invalid DNA Read Back’ option or the ‘Fail on Invalid ID Read Back’ option under Device->Settings to ‘1 (Do not fail).’ The algorithm will still print out an error message but will not fail the DUT. |
| 9. | This is a custom device selection. Please contact Xilinx before use. |
| 10. | This device selection requires the use of BP-2800 Enhanced FX800-SITE-C01. |
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BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| 8-bit Bytes | 33554432 |
|---|---|
| Manufacturer | Xilinx |
| Packages | FBGA(484) |
| Part Number | XCZU2CG-1SBVA484E |
| Set programming | Yes |
| Vcc(program) | 1.8 |
| Package |