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Altera 10M02SCE144C6G QFP(144) Device

Adapters for Automated Programmers

6th Gen 7th Gen 8th Gen 9th Gen
FASMR144QFPC FX2ASMR144QFPC, FASMR144QFPC, LX2ASMR144QFPC (repl.) FVE2ASMR144QFPC, FVE2ASMR144QFPC LX2ASMR144QFPCA

Adapters for Manual Programmers

6th Gen 7th Gen 8th Gen 9th Gen
FASMR144QFPC FX2ASMR144QFPC, FASMR144QFPC, LX2ASMR144QFPC (repl.) FVE2ASMR144QFPC, FVE2ASMR144QFPC LX2ASMR144QFPCA

Adapters for Engineering Programmers

6th Gen 7th Gen
FASMR144QFPC FX2ASMR144QFPC, FASMR144QFPC, LX2ASMR144QFPC (repl.)

Last Updated: 05/18/2023

If the device is not yet supported by your BPM programmer (Generation), request Device Support

Note


IMPORTANT:

Device Type: PLD
Algorithm Programming method: JTAG


Memory Organization:

Memory Type

Attributes(*)

Included in default Range (Y/N) DUT Physical Byte Address(hex)(if this area is selected/Activated) BPWin Buffer Byte Address(hex)
DSM W Yes 0000_0000 – 0000_01FF 0000_0000 – 0000_03FF
UFM1 R/W/E Yes 0000_0200 – 0000_07FF 0000_0400 – 0000_0FFF
UFM0 R/W/E Yes 0000_0800 – 0000_0DFF 0000_1000 – 0000_1BFF
CFM0 R/W/E Yes 0000_0E00 – 0000_51FF 0000_1C00 – 0000_A3FF
Default Algorithm Range 0000_0000 – 0000_A3FF 0000_0000 – 0000_51FF

* R:Read only W:One time programmable (OTP) R/W:readable and one time programmable (OTP) R/W/E:readable and rewritable if not locked. Any configurations listed under Device-Specific’ in the menu item Device-> Settings will be written to the DUT during ‘Program’ operation regardless of memory range selection. Special Device Considerations:

Data pattern must be loaded from a device-appropriate POF file. Configurations including security settings are programmed based on the POF file settings. Serialization is not supported for this device.

BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.

Additional information

Part Number

10M02SCE144C6G

Package
Packages

QFP(144)

Manufacturer

Altera