Xilinx XC6SLX75T-FGG484 FBGA(484) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FASMR484FBGA, LASMR484FBGA (repl.) | FASMR484FBGA, LASMR484FBGA (repl.) | LASMR484FBGA |
Adapters for Manual Programmers
| 6th Gen | 7th Gen | 9th Gen |
| FASMR484FBGA, LASMR484FBGA (repl.) | FASMR484FBGA, LASMR484FBGA (repl.) | LASMR484FBGA |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FASMR484FBGA, LASMR484FBGA (repl.) | FASMR484FBGA, LASMR484FBGA (repl.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT:
| Device Type: | Xilinx Spartan-6 FPGA |
| Device Memory Type: | eFUSE |
| Algorithm Programming Method: | JTAG |
| Serialization Supported: | No |
Memory Organization:
| Memory Type | Attributes* | Included in Default Range (Y/N) | BPWin Buffer Address (hex) |
| FUSE_KEY | R/W | Yes | 00 – 1F |
| Default Algorithm Range | — | — | 00 – 1F |
* R/W: verifiable and one time programmable (OTP). Configuration Options:
| eFUSE Mapping | Attributes* | Description | Default Value |
| FUSE_CNTL[8 12] | R/W | FUSE_CNTL Read/Write Security | Unprogrammed (0) |
| FUSE_CNTL[10 14] | R/W | AES FUSE_KEY Read/Write Security | Unprogrammed (0) |
| FUSE_CNTL[16] | R/W | Re-configure after power cycle only | Unprogrammed (0) |
| FUSE_CNTL[17] | R/W | Configure with AES eFUSE key only | Unprogrammed (0) |
* R/W: verifiable and one time programmable (OTP). Special Device Considerations:
| 1. | Each fuse is One-Time Programmable (OTP). |
| 2. | The AES FUSE_KEY value is LSB-to-MSB. For example FUSE_KEY[0:7] maps to Data Buffer Address [00h] bits [7:0]. Likewise FUSE_KEY[248:255] maps to Data Buffer Address [1Fh] bits [7:0]. |
| 3. | Please enter the key value as written in the Xilinx Spartan-6 NKY file starting at Data Buffer Address [00h] and ending at [1Fh]. |
| 4. | If FUSE_CNTL Read/Write Security is selected under Device->Settings the individual bits of FUSE_CNTL will not be verified. Rather the algorithm will verify that FUSE_CNTL reads back as blank. |
| 5. | If AES FUSE_KEY Read/Write Security is selected under Device->Settings FUSE_KEY will be verified normally for Verify during Program. For stand-alone Verify the algorithm will verify that FUSE_KEY reads back as blank. |
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BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| 8-bit Bytes | 32 |
|---|---|
| Manufacturer | Xilinx |
| Packages | FBGA(484) |
| Part Number | XC6SLX75T-FGG484 |
| Vcc(program) | 1.2 |
| Package |