Waferscale Integration PSD913F1V PLCC(52) Device
Adapters for Automated Programmers
| 6th Gen | 7th Gen |
| FASM52PC, FASM52P, FASM52PI | FASM52PC, FASM52P, FASM52PI |
Adapters for Manual Programmers
| 6th Gen | 7th Gen |
| FSM52PC, FSM52PCA, FSM52P, FSM52PA, FSM52PH, FSM52PMBW, FSM52PI, FSM84UP, FASM52PC, FASM52P, FASM52PI, FSM84AH (obs.), FSM84UPB (obs.), FSM84AHA (obs.) | FSM52PC, FSM52PCA, FSM52P, FSM52PA, FSM52PH, FSM52PMBW, FSM52PI, FSM84UP, FASM52PC, FASM52P, FASM52PI, FSM84AH (obs.), FSM84UPB (obs.), FSM84AHA (obs.) |
Adapters for Engineering Programmers
| 6th Gen | 7th Gen |
| FSM52PC, FSM52PCA, FSM52P, FSM52PA, FSM52PH, FSM52PMBW, FSM52PI, FSM84UP, FASM52PC, FASM52P, FASM52PI, FSM84AH (obs.), FSM84UPB (obs.), FSM84AHA (obs.) | FSM52PC, FSM52PCA, FSM52P, FSM52PA, FSM52PH, FSM52PMBW, FSM52PI, FSM84UP, FASM52PC, FASM52P, FASM52PI, FSM84AH (obs.), FSM84UPB (obs.), FSM84AHA (obs.) |
Last Updated: 05/18/2023
If the device is not yet supported by your BPM programmer (Generation), request Device Support
Note
IMPORTANT: Make sure that the default buffer value under Buffer/Options’is set to 00h before loading data patterns.For correct checksum calculationin the buffer addresses [340CFh] [340E0h-340E1h] should be set to 00h;in the device run Device/Sum command.Before load the buffer please set the ‘Automatic lowest address to load’under Buffer/Options to ‘DISABLE’.Once the OTP Row is programmed it can not be erased or reprogrammed.Verification after programming is a redundant operation. To disable itgo to ‘Device/Options’ and set ‘Verify after programming’ to ‘NONE’. ‘
BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.
Additional information
| 8-bit Bytes | 213250 |
|---|---|
| Manufacturer | Waferscale Integration |
| Packages | PLCC(52) |
| Part Number | PSD913F1V |
| Set programming | Yes |
| Vcc(program) | 3.3 |
| Package |