Adesto Technologies AT25SF641-S-T SOIC(8) Device

Adapters for Automated Programmers

8th Gen	9th Gen	Flashstream
FVE4ASMH08SA, FVE4ASMR08SHLA, FVE4ASM08SHLA, FVE4ASMR08SHA (obs.), FVE4ASM08SHA (obs.), FVE4ASM08SHA (obs.), FVE4ASMH08SA, FVE4ASMR08SHA (obs.), FVE4ASMR08SHLA, FVE4ASM08SHLA	FVE4ASM08SHA (obs.), FVE4ASMH08SA, FVE4ASMR08SHA (obs.), FVE4ASMR08SHLA, FVE4ASM08SHLA	FVE4ASMH08SA, FVE4ASMR08SHLA, FVE4ASM08SHLA, FVE4ASMR08SHA (obs.), FVE4ASM08SHA (obs.), FVE4ASM08SHA (obs.), FVE4ASMH08SA, FVE4ASMR08SHA (obs.), FVE4ASMR08SHLA, FVE4ASM08SHLA

Adapters for Manual Programmers

8th Gen	9th Gen	Flashstream
FVE4ASMH08SA, FVE4ASMR08SHLA, FVE4ASM08SHLA, FVE4ASMR08SHA (obs.), FVE4ASM08SHA (obs.), FVE4ASM08SHA (obs.), FVE4ASMH08SA, FVE4ASMR08SHA (obs.), FVE4ASMR08SHLA, FVE4ASM08SHLA	FVE4ASM08SHA (obs.), FVE4ASMH08SA, FVE4ASMR08SHA (obs.), FVE4ASMR08SHLA, FVE4ASM08SHLA	FVE4ASMH08SA, FVE4ASMR08SHLA, FVE4ASM08SHLA, FVE4ASMR08SHA (obs.), FVE4ASM08SHA (obs.), FVE4ASM08SHA (obs.), FVE4ASMH08SA, FVE4ASMR08SHA (obs.), FVE4ASMR08SHLA, FVE4ASM08SHLA

Adapters for Engineering Programmers

Last Updated: 05/18/2023

If the device is not yet supported by your BPM programmer (Generation), request Device Support

Request Support Options

Note

IMPORTANT:

Device Type:	Flash Memory
Device Size:	64 Mbit
Algorithm Programming method:	Standard SPI

Memory Organization:

Memory Type	*Attributes^()**	Included in default Range (Y/N)	DUT Physical Byte Address(hex)(if this area is selected/Activated)	BPWin Buffer Byte Address(hex)
Main Flash Area	R/W/E	Yes	000_0000h-07F_FFFFh	000_0000h-07F_FFFFh

Default Algorithm Range	R/W/E	Yes	000_0000h-07F_FFFFh	000_0000h-07F_FFFFh

* R:Read only W:One time programmable (OTP) R/W:readable and one time programmable (OTP) R/W/E:readable and rewritable if not locked. Any configurations listed under Device-Specific’ in the menu item Device-> Settings will be written to the DUT during ‘Program’ operation regardless of memory range selection. Special Device Considerations:

This algorithm uses Standard SPI mode to Program and Verify/Read the device. The status register bits can be set under Device > Configure. This algo does not support Quad SPI.There is a 4k-Bit OTP security register mapped to buffer locaitons 0x800000-0x8001FF.

‘



BPM does not sell programmable devices, nor do we program devices directly. BPM makes programmers and accessories to make programming in-house fast, easy, and profitable.

More Info

Additional information

Manufacturer	Adesto Technologies
Package
Packages	SOIC(8)
Bytes	0h-7F FFFFh; 80 0000h-80 01FFh
ByteWidth	AT25SF641-S-T (ID=3217h)
VccProgram	8-bit Bytes
VppProgram	8389120
ElectricalErase	3.3