Cypress S25FL132K0XBHIS33 BGA(24) Device

IMPORTANT: 32M-bit Serial Flash. This algorithm uses Standard SPI mode to Program and Verify/Read the device. The status register bits can be set under Device > Configure . Erase must be selected if device to be programmed already has QE bit enabled. There are three 256-Byte Security Registers with OTP locks independent from main memory mapped to [401000-4010FF][402000-4020FF][403000-4030FF] in the Data Pattern respectively. Setting both SPR0 and SPR1 to 1 will permanently lock Status Register 1 and 2. The device can no longer be erased or programmed after the Status Registers has been permanently locked. The default Device Range is set to [000000h-3FFFFFh]. Please modify the range under Device > Range if any of the Security Registers needs to be included.