The SMTA Long Island Trade Show

The SMTA Long Island Trade Show

150 attendees evangelize electronics

David Roy, Regional Sales Manager for BPM Microsystems, represented BPM at the Long Island SMTA Show October 4, 2018. He met with contract electronics manufacturers and was able to introduce and spread the word about BPM Microsystems to about 100 of the 150 attendees. “Several participants took extra business cards to evangelize on behalf of BPM Microsystems as well,” said Mr. Roy.  “I expect in time to get 1 to 2 new APS opportunities directly or indirectly generated from this show.”

BPM Microsystems to bring its 8th Generation universal device programmers to DAC 2013

HOUSTON — May 16, 2013 — BPM Microsystems announces that it will exhibit its award-winning 2800ISP parallel in-system device programmer as well as its 2800 manual universal device programmer in booth #333 at the upcoming Design Automation Conference (DAC), scheduled to take place June 2-6, 2013 at the Austin Convention Center in Texas.

The new 2800ISP incorporates the company’s 8th Generation site technology utilizing its Vector Engine Co-Processor® into a custom-designed test fixture, allowing its customers to program flash architectures including eMMC, PCM and Raw NAND, plus MCUs and other device technologies on-board after reflow. In 2012 the company added support for third party functional testing, such as boundary scan, with the capability to test up to 240 pins in addition to the 960 pins available for programming.

Ideal for medium- to high-volume production, the 2800ISP is configurable and can program up to 16 devices in parallel. Like all 8th Generation programmers, the 2800ISP with BPM’s Vector Engine Co-Processor is capable of achieving an amazing peak operating rate of 12.8 Gb per second. This solves the test bottleneck while allowing the operator to program the latest data just in time, all while attaining a very low programming cost per device.

The 2800 combines the unrivaled speed of the Vector Engine Co-Processor with true universal device support, resulting in the fastest manual universal programmer in the industry.

 

Kasion Automation to demonstrate BPM Microsystems’ 2800ISP device programmer at NEPCON China 2013

Kasion Automation to demonstrate BPM Microsystems’ 2800ISP device programmer at NEPCON China 2013

HOUSTON — April 8, 2013 — BPM Microsystems announces that its distributor Kasion Automation Ltd. (KAL) will exhibit the award-winning 2800ISP parallel in-system device programmer in booth #1G56 at NEPCON China 2013, scheduled to take place April 23-25, 2013 at the Shanghai World EXPO Exhibition & Convention Center.

Ideal for medium- to high-volume production, the 2800ISP is configurable and can program up to 16 devices in parallel. Like all 8th Generation programmers, the 2800ISP with BPM’s Vector Engine Co-Processor is capable of achieving an amazing peak operating rate of 12.8 Gb per second. This solves the test bottleneck while allowing the operator to program the latest data just in time, all while attaining a very low programming cost per device.

The new 2800ISP incorporates the company’s 8th Generation site technology utilizing its Vector Engine Co-Processor® into a custom-designed test fixture, allowing its customers to program flash architectures including eMMC, PCM and Raw NAND, plus MCUs and other device technologies on-board after reflow. In 2012, the company added support for third party functional testing, such as boundary scan, with the capability to test up to 240 pins in addition to the 960 pins available for programming.

BPM Microsystems’ 2800 universal device programmer on display at SMT/Hybrid/Packaging 2013

BPM Microsystems’ 2800 universal device programmer on display at SMT/Hybrid/Packaging 2013

HOUSTON — March 27, 2013 — BPM Microsystems will highlight model 2800, a member of its manual universal device programmer family, in representative Adaptsys’ booth #7-249 at the SMT Hybrid Packaging exhibition and conference, scheduled to take place April 16-18, 2013 at the Messezentrum in Nuremberg, Germany. The 2800 combines the unrivaled speed of Vector Engine Co-Processor® technology plus true universal device support, resulting in the fastest universal programmer in the industry.

The ultra-fast programming speed of the 2800 is attributed to BPM Microsystems’ Vector Engine Co-Processor, the same proven technology that established Flashstream® as the fastest flash-dedicated programmer. This technology uses a co-processor design to hardware-accelerate waveforms during the programming cycle. Faster speeds are achieved through synchronous operations that eliminate the dead times so that the device under test no longer waits for the programmer. The result is programming near the theoretical limits of the silicon design — the faster the device, the faster the device is programmed.

The 2800 supports all device technologies including high-density NAND flash, NOR flash, serial flash, managed NAND flash, EPROM, EEPROM, flash EPROM, microcontrollers and more with densities up to an 8Eb theoretical limit.

Model 2800 also uses BPM Microsystems’ cost-effective, efficient socket cards with receptacle-base socket option. Individual socket cards can be fully utilized and replaced without dramatically affecting programming capacity. With the receptacle-base socket option, customers can purchase only the consumable socket as needed. The design of BPM Microsystems’ socket cards increases manufacturing uptime, produces higher first-pass yield and saves replacement costs by as much as 75 percent.

BPM Microsystems’ cutting-edge technology to be displayed at DESIGN West 2013

BPM Microsystems’ cutting-edge technology to be displayed at DESIGN West 2013

HOUSTON — March 15, 2013 — BPM Microsystems announces that it will exhibit its award-winning 2800ISP parallel in-system device programmer in Booth #2134 at the DESIGN West conference and exhibition, scheduled to take place April 22-25, 2013 at the McEnery Convention Center in San Jose, CA.

The new 2800ISP incorporates the company’s 8th Generation site technology utilizing its Vector Engine Co-Processor® into a custom-designed test fixture, allowing its customers to program flash architectures including eMMC, PCM and Raw NAND, plus MCUs and other device technologies on-board after reflow. In 2012, the company added support for third party functional testing, such as boundary scan, with the capability to test up to 240 pins in addition to the 960 pins available for programming.

Ideal for medium- to high-volume production, the 2800ISP is configurable and can program up to 16 devices in parallel. Like all 8th Generation programmers, the 2800ISP with BPM’s Vector Engine Co-Processor is capable of achieving an amazing peak operating rate of 12.8 Gb per second. This solves the test bottleneck while allowing the operator to program the latest data just in time, all while attaining a very low programming cost per device.

For more information, meet with company representatives in Booth #2134 at the show.

 

BPM Microsystems to demonstrate the 2800ISP at the Houston SMTA Expo

BPM Microsystems to demonstrate the 2800ISP at the Houston SMTA Expo

HOUSTON — March 13, 2013 — BPM Microsystems announces that it will exhibit its award-winning 2800ISP parallel in-system device programmer at the Houston SMTA Expo, scheduled to take place March 14, 2013 at the Stafford Centre in Stafford, TX.

The new 2800ISP incorporates the company’s 8th Generation site technology utilizing its Vector Engine Co-Processor® into a custom-designed test fixture, allowing its customers to program flash architectures including eMMC, PCM and raw NAND, plus MCUs and other device technologies on-board after reflow. In 2012, the company added support for third party functional testing, such as boundary scan, with the capability to test up to 240 pins in addition to the 960 pins available for programming.

Ideal for medium- to high-volume production, the 2800ISP is configurable and can program up to 16 devices in parallel. Like all 8th Generation programmers, the 2800ISP with BPM’s Vector Engine Co-Processor is capable of achieving an amazing peak operating rate of 12.8 Gb per second. This solves the test bottleneck while allowing the operator to program the latest data just in time, all while attaining a very low programming cost per device.